SH7619_09 Datasheet, PDF (790/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 25 Electrical Characteristics
CKIO
A25 to A0
A11*¹
CSn
RD/WR
RAS
CAS
DQMxx
Tr
Trw
Tc1
Tcw
t_AD1
Row address
t_AD1
t_CSD1
t_AD1
Column address
t_AD1
t_AD1
Read A command
t_RWD
t_RASD
t_RASD
t_CASD
t_CASD
t_DQMD
D15 to D0
BS
CKE
t_DACD
DACKn*²
t_BSD
t_BSD
(High)
Td1
Tde
Tap
t_AD1
t_CSD1
t_RWD
t_DQMD
t_RDS2
t_RDH2
t_DACD
Notes: * 1. Address pins connected to A10 in SDRAM
2. DACKn is the waveform when active low is selected.
Figure 25.17 Synchronous DRAM Single Read Bus Cycle (Auto-Precharge,
CAS Latency = 2, WTRCD = 1 Cycle, WTRP = 1 Cycle)
Rev. 6.00 Jul. 15, 2009 Page 750 of 816
REJ09B0237-0600