SH7619_09 Datasheet, PDF (11/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Contents
Section 1 Overview................................................................................................1
1.1 Features................................................................................................................................. 2
1.2 Block Diagram...................................................................................................................... 7
1.3 Pin Assignments ................................................................................................................... 8
1.4 Pin Functions ........................................................................................................................ 9
Section 2 CPU......................................................................................................23
2.1 Features............................................................................................................................... 23
2.2 Register Configuration........................................................................................................ 23
2.2.1 General Registers (Rn)........................................................................................ 25
2.2.2 Control Registers ................................................................................................ 25
2.2.3 System Registers................................................................................................. 26
2.2.4 Initial Values of Registers................................................................................... 27
2.3 Data Formats....................................................................................................................... 28
2.3.1 Register Data Format .......................................................................................... 28
2.3.2 Memory Data Formats ........................................................................................ 28
2.3.3 Immediate Data Formats..................................................................................... 29
2.4 Features of Instructions....................................................................................................... 29
2.4.1 RISC Type .......................................................................................................... 29
2.4.2 Addressing Modes .............................................................................................. 32
2.4.3 Instruction Formats ............................................................................................. 35
2.5 Instruction Set ..................................................................................................................... 39
2.5.1 Instruction Set by Type....................................................................................... 39
2.6 Processing States................................................................................................................. 51
2.6.1 State Transition ................................................................................................... 51
Section 3 Cache ...................................................................................................53
3.1 Features............................................................................................................................... 53
3.1.1 Cache Structure................................................................................................... 53
3.1.2 Divided Areas and Cache.................................................................................... 55
3.2 Register Descriptions.......................................................................................................... 56
3.2.1 Cache Control Register 1 (CCR1) ...................................................................... 56
3.3 Operation ............................................................................................................................ 57
3.3.1 Searching Cache ................................................................................................. 57
3.3.2 Read Access........................................................................................................ 58
3.3.3 Write Access ....................................................................................................... 59
Rev. 6.00 Jul. 15, 2009 Page ix of xxxviii