SH7619_09 Datasheet, PDF (455/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.8 SCSMR Settings and SCIF Communication Formats
SCSMR Settings
Bit 7 Bit 6 Bit 5 Bit 3
C/A CHR PE STOP Mode
0
0
0
0
Asynchronous
1
1
0
1
1
0
0
1
1
0
1
1
*
*
*
Synchronous
Note: * : Don't care
SCIF Communication Format
Data Length Parity Bit
Stop Bit
Length
8 bits
Not set
1 bit
2 bits
Set
1 bit
2 bits
7 bits
Not set
1 bit
2 bits
Set
1 bit
2 bits
8 bits
Not set
None
Table 15.9 SCSMR and SCSCR Settings and SCIF Clock Source Selection
SCSMR
SCSCR
Settings
Bit 7
C/A
Bit 1 Bit 0
CKE1 CKE0
0
0
0
Mode
Asynchronous
1
1
0
1
1
0
*
1
0
1
Note: * : Don't care
Synchronous
SCIF Transmit/Receive Clock
Clock
Source SCK Pin Function
Internal
SCIF does not use the SCK pin. The state
of the SCK pin depends on both the SCKIO
and SCKDT bits.
Clock with a frequency 16 times the bit rate
is output.
External Input a clock with frequency 16 times the
bit rate.

Setting prohibited.
Internal Serial clock is output.
External Input the serial clock.

Setting prohibited.
Rev. 6.00 Jul. 15, 2009 Page 415 of 816
REJ09B0237-0600