SH7619_09 Datasheet, PDF (496/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 16 Serial I/O with FIFO (SIOF)
16.3.4 Receive Data Register (SIRDR)
SIRDR is a 32-bit read-only register that reads receive data of the SIOF. SIRDR stores data in the
receive FIFO and is initialized to undefined value by the conditions specified in section 24, List of
Registers, or by a receive reset caused by the RXRST bit in SICTR.
Initial
Bit
Bit Name Value
R/W
31 to 16 SIRDL
15 to 0
Undefined R
15 to 0 SIRDR
15 to 0
Undefined R
Description
Left-Channel Receive Data
Store data received from the SIOFRxD pin as left-
channel data. The position of the left-channel data in
the receive frame is specified by the RDLA bit in
SIRDAR.
• These bits are valid only when the RDLE bit in
SIRDAR is set to 1.
Right-Channel Receive Data
Store data received from the SIOFRxD pin as right-
channel data. The position of the right-channel data in
the receive frame is specified by the RDRA bit in
SIRDAR.
• These bits are valid only when the RDRE bit in
SIRDAR is set to 1.
Rev. 6.00 Jul. 15, 2009 Page 456 of 816
REJ09B0237-0600