SH7046 Datasheet, PDF (91/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 4 Clock Pulse Generator
Section 4 Clock Pulse Generator
This LSI has an on-chip clock pulse generator (CPG) that generates the system clock (φ) and
peripheral clock (Pφ) to generate the internal clock (φ/2 to φ/8192, Pφ/2 to Pφ/1024). The CPG
consists of an oscillator, PLL circuit, and pre-scaler. A block diagram of the clock pulse generator
is shown in figure 4.1. The frequency from the oscillator can be modified by the PLL circuit.
PLLCAP
EXTAL
XTAL
Oscillator
PLL circuit
Clock divider
(× 1/2)
MD2
Clock mode
MD3
control circuitry
Pre-scaler
Pre-scaler
φ
φ/2 to
φ/8192
Pφ/2 to
Pφ
Pφ/1024
Within the LSI
Figure 4.1 Block Diagram of the Clock Pulse Generator
4.1 Oscillator
Clock pulses can be supplied from a connected crystal resonator or an external clock.
4.1.1 Connecting a Crystal Resonator
Circuit Configuration: A crystal resonator can be connected as shown in figure 4.2. Use the
damping resistance (Rd) listed in table 4.1. Use an AT-cut parallel-resonance type crystal
resonator that has a resonance frequency of 4–12.5 MHz. It is recommended to consult crystal
dealer concerning the compatibility of the crystal resonator and the LSI.
CPG0110B_000020020700
Rev. 4.00 Dec 05, 2005 page 47 of 564
REJ09B0270-0400