SH7046 Datasheet, PDF (600/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Appendix A Internal I/O Register
Register
Abbreviation
Power-On
Reset
Manual
Reset
Software
Standby
Module
Standby
Sleep
Module
MMT_TMDR
Initialized
Held
Initialized
Initialized
Held
MMT
TCNR
Initialized
Held
Initialized
Initialized
Held
MMT_TSR
Initialized
Held
Initialized
Initialized
Held
MMT_TCNT
Initialized
Held
Initialized
Initialized
Held
TPDR
Initialized
Held
Initialized
Initialized
Held
TPBR
Initialized
Held
Initialized
Initialized
Held
MMT_TDDR
Initialized
Held
Initialized
Initialized
Held
TBRU_B
Initialized
Held
Initialized
Initialized
Held
TGRUU
Initialized
Held
Initialized
Initialized
Held
TGRU
Initialized
Held
Initialized
Initialized
Held
TGRUD
Initialized
Held
Initialized
Initialized
Held
TDCNT0
Initialized
Held
Initialized
Initialized
Held
TDCNT1
Initialized
Held
Initialized
Initialized
Held
TBRU_F
Initialized
Held
Initialized
Initialized
Held
TBRV_B
Initialized
Held
Initialized
Initialized
Held
TGRVU
Initialized
Held
Initialized
Initialized
Held
TGRV
Initialized
Held
Initialized
Initialized
Held
TGRVD
Initialized
Held
Initialized
Initialized
Held
TDCNT2
Initialized
Held
Initialized
Initialized
Held
TDCNT3
Initialized
Held
Initialized
Initialized
Held
TBRV_F
Initialized
Held
Initialized
Initialized
Held
TBRW_B
Initialized
Held
Initialized
Initialized
Held
TGRWU
Initialized
Held
Initialized
Initialized
Held
TGRW
Initialized
Held
Initialized
Initialized
Held
TGRWD
Initialized
Held
Initialized
Initialized
Held
TDCNT4
Initialized
Held
Initialized
Initialized
Held
TDCNT5
Initialized
Held
Initialized
Initialized
Held
TBRW_F
Initialized
Held
Initialized
Initialized
Held
Notes: 1. The bits 7 to 5 (OVF, WT/IT, and TME) in TCSR are initialized and the bits 2 to 0 (CKS2
to CKS0) are retained.
2. RSTCSR is retained in spite of power-on reset by WDT overflow.
Rev. 4.00 Dec 05, 2005 page 556 of 564
REJ09B0270-0400