SH7046 Datasheet, PDF (416/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 13 A/D Converter
13.3 Register Description
The A/D converter has the following registers. For details on register addresses, refer to appendix
A, Internal I/O Register.
• A/D data register 8 (H/L) (ADDR8)
• A/D data register 9 (H/L) (ADDR9)
• A/D data register 10 (H/L) (ADDR10)
• A/D data register 11 (H/L) (ADDR11)
• A/D data register 12 (H/L) (ADDR12)
• A/D data register 13 (H/L) (ADDR13)
• A/D data register 14 (H/L) (ADDR14)
• A/D data register 15 (H/L) (ADDR15)
• A/D data register 16 (H/L) (ADDR16)
• A/D data register 17 (H/L) (ADDR17)
• A/D data register 18 (H/L) (ADDR18)
• A/D data register 19 (H/L) (ADDR19)
• A/D control/status register_0 (ADCSR_0)
• A/D control/status register_1 (ADCSR_1)
• A/D control/status register_2 (ADCSR_2)
• A/D control register_0 (ADCR_0)
• A/D control register_1 (ADCR_1)
• A/D control register_2 (ADCR_2)
• A/D trigger select register (ADTSR)
13.3.1 A/D Data Registers 8 to 19 (ADDR8 to ADDR19)
ADDRs are 16-bit read-only registers. The conversion result for each analog input channel is
stored in ADDR with the corresponding number. (For example, the conversion result of AN8 is
stored in ADDR8.)
The converted 10-bit data is stored in bits 6 to 15. The lower 6 bits are always read as 0.
The data bus between the CPU and the A/D converter is 8 bits wide. The upper byte can be read
directly from the CPU, however the lower byte should be read via a temporary register. The
temporary register contents are transferred from the ADDR when the upper byte data is read.
When reading the ADDR, read the upper byte before the lower byte, or read in word unit. The
initial value of ADDR is H'0000.
Rev. 4.00 Dec 05, 2005 page 372 of 564
REJ09B0270-0400