SH7046 Datasheet, PDF (538/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 21 Power-Down Modes
Table 21.1 Internal Operation States in Each Mode
Function
Normal
operation
Sleep
Module
Standby
Software
Standby
System clock pulse generator Functioning Functioning Functioning Halted
CPU
Instructions
Registers
Functioning
Halted
(retained)
Functioning
Halted
(retained)
External
interrupts
NMI
Functioning
IRQ3 to IRQ0
Functioning
Functioning
Functioning
Peripheral
functions
UBC
Functioning
Functioning
Halted
(reset)
Halted
(retained)
DTC
Functioning
Functioning
Halted
(reset)
Halted
(reset)
I/O port
Functioning Functioning Functioning Retained
WDT
Functioning
Functioning
Functioning
Halted
(retained)
SCI
Functioning Functioning Halted
Halted
A/D
(reset)
(reset)
MTU
CMT
MMT
ROM
Functioning
Functioning
Halted
(reset)
Halted
(reset)
RAM
Functioning Functioning Retained
Retained
Notes: 1. "Halted (retained)" means that the operation of the internal state is suspended, although
internal register values are retained.
2. "Halted (reset)" means that internal register values and internal state are initialized.
3. In module standby mode, only modules for which a stop setting has been made are
halted (reset or retained).
4. There are two types of on-chip peripheral module registers; ones which are initialized in
software standby mode and module standby mode, and those not initialized those
modes. For details, refer to appendix A.3, Register States in Each Operating Mode.
5. The port high-impedance bit (HIZ) in SBYCR sets the state of the I/O port in software
standby mode. For details on the setting, refer to section 21.2.1, Standby Control
Register (SBYCR). For the state of pins, refer to appendix B, Pin States.
Rev. 4.00 Dec 05, 2005 page 494 of 564
REJ09B0270-0400