SH7046 Datasheet, PDF (420/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 13 A/D Converter
13.3.4 A/D Trigger Select Register (ADTSR)
The ADTSR enables an A/D conversion started by an external trigger signal.
Initial
Bit Bit Name Value R/W
7, 6 
All 0 R
5
TRG2S1 0
R/W
4
TRG2S0 0
R/W
3
TRG1S1 0
R/W
2
TRG1S0 0
R/W
Description
Reserved
These bits are always read as 0, and should only be
written with 0.
AD Trigger 2 Select 1 and 0
Enable the start of A/D conversion by A/D2 with a trigger
signal.
00: A/D conversion start by external trigger pin (ADTRG)
or MTU trigger is enabled
01: A/D conversion start by external trigger pin (ADTRG)
is enabled
10: A/D conversion start by MTU trigger is enabled
11: A/D conversion start by MMT trigger is enabled
When changing the operating mode, first clear the TRGE
and ADST bit in the A/D control registers (ADCRs) to 0.
AD Trigger 1 Select 1 and 0
Enable the start of A/D conversion by A/D1 with a trigger
signal.
00: A/D conversion start by external trigger pin (ADTRG)
or MTU trigger is enabled
01: A/D conversion start by external trigger pin (ADTRG)
is enabled
10: A/D conversion start by MTU trigger is enabled
11: A/D conversion start by MMT trigger is enabled
When changing the operating mode, first clear the TRGE
and ADST bit in the A/D control registers (ADCRs) to 0.
Rev. 4.00 Dec 05, 2005 page 376 of 564
REJ09B0270-0400