SH7046 Datasheet, PDF (504/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 18 Flash Memory (F-ZTAT Version)
Internal address bus
Internal data bus (32 bits)
FLMCR1
FLMCR2
EBR1
EBR2
RAMER
Bus interface/controller
Operating
mode
FWP pin
Mode pin
Flash memory
(256 kbytes)
Legend:
FLMCR1: Flash memory control register 1
FLMCR2: Flash memory control register 2
EBR1: Erase block register 1
EBR2: Erase block register 2
RAMER: RAM emulation register
Figure 18.1 Block Diagram of Flash Memory
18.2 Mode Transitions
When the mode pin and the FWP pin are set in the reset state and a reset-start is executed, this LSI
enters an operating mode as shown in figure 18.2. In user mode, flash memory can be read but not
programmed or erased.
The boot, user program, and PROM programmer modes are provided as modes to write and erase
the flash memory.
The differences between boot mode and user program mode are shown in table 18.1.
Rev. 4.00 Dec 05, 2005 page 460 of 564
REJ09B0270-0400