SH7046 Datasheet, PDF (458/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 15 Motor Management Timer (MMT)
External Counter Clear Function: In the operating modes, the TCNT counter can be cleared
from an external source. When using the counter clearing function, port A I/O register L
(PAIORL) should be used to set the PCIO pin as an input.
On the falling edge of PCIO pin (when set to input), the TCNT counter is reset to 2Td (the initial
setting). It then counts up until it reaches the value in TPDR, then starts counting down. When the
count returns to 2Td, TCNT starts counting up again, and this sequence is repeated. Figure 15.6
shows the example for counter clearing.
TPDR
TCNT
2Td
H'0000
PCIO
(counter clear
input)
Figure 15.6 Example of TCNT Counter Clearing
Toggle Output Synchronized with PWM Cycle: In the operating modes, output can be toggled
synchronously with the PWM carrier cycle. When outputting the PWM cycle, the pin function
controller (PFC) should be used to set the PCIO pin as an output(when set to output). An example
of the toggle output waveform is shown in figure 15.7.
PWM cycle output is toggled according to the TCNT count direction. The toggle output pin is
PCIO (when set to output). PCIO outputs 1 when TCNT is counting up, and 0 when counting
down.
Rev. 4.00 Dec 05, 2005 page 414 of 564
REJ09B0270-0400