SH7046 Datasheet, PDF (464/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 15 Motor Management Timer (MMT)
15.6.2 Interrupt Signal Timing
Timing of TGF Flag Setting by Compare Match: Figure 15.12 shows the timing of setting of
the TGF flag in the timer status register (TSR) on a compare match between TCNT and TPDR,
and the timing of the TGI interrupt request signal. The timing is the same for a compare match
between TCNT and 2Td.
Pφ
TCNT
TPDR
Compare match
signal
TGF flag
N–3 N–2 N–1 N N+1 N+2 N+3 N+4
N
TGI interrupt
Figure 15.12 TGI Interrupt Timing
Rev. 4.00 Dec 05, 2005 page 420 of 564
REJ09B0270-0400