SH7046 Datasheet, PDF (70/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 2 CPU
Classification Types
System
11
control
Total: 62
Operation
Code
Function
CLRT
T bit clear
CLRMAC MAC register clear
LDC
Load to control register
LDS
Load to system register
NOP
No operation
RTE
Return from exception processing
SETT
T bit set
SLEEP Transition to power-down mode
STC
Store control register data
STS
Store system register data
TRAPA Trap exception handling
No. of
Instructions
31
142
The table below shows the format of instruction codes, operation, and execution states. They are
described by using this format according to their classification.
Rev. 4.00 Dec 05, 2005 page 26 of 564
REJ09B0270-0400