SH7046 Datasheet, PDF (194/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 10 Multi-Function Timer Pulse Unit (MTU)
Table 10.12 TIORL_0 (channel 0)
Description
Bit 7 Bit 6 Bit 5 Bit 4 TGRD_0
IOD3 IOD2 IOD1 IOD0 Function
TIOC0D Pin Function
0
0
0
0
Output
Output hold^*1
1
compare
Initial output is 0
register
0 output at compare match
1
0
Initial output is 0
1 output at compare match
1
Initial output is 0
Toggle output at compare match
1
0
0
Output hold
1
Initial output is 1
0 output at compare match
1
0
Initial output is 1
1 output at compare match
1
Initial output is 1
Toggle output at compare match
1
0
0
0
Input
Input capture at rising edge
1
capture
register^*2
Input capture at falling edge
1
X
Input capture at both edges
1
X
X
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down
Legend:
X: Don’t care
Notes: 1. The low level output is retained until TIOR contents is specified after a power-on reset.
2. When the BFB bit in TMDR_0 is set to 1 and TGRD_0 is used as a buffer register, this
setting is invalid and input capture/output compare is not generated.
Rev. 4.00 Dec 05, 2005 page 150 of 564
REJ09B0270-0400