SH7046 Datasheet, PDF (502/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 17 I/O Ports
17.5.1 Register Description
Port G is a 4-bit input-only port. Port G has the following register. For details on register addresses
and register states during each processing, refer to appendix A, Internal I/O Register.
• Port G data register (PGDR)
17.5.2 Port G Data Register (PGDR)
The port G data register (PGDR) is an 8-bit read-only register that stores port G data.
Bits PG3DR to PG0DR correspond to pins PG3 to PG0 (multiplexed functions omitted here).
Any value written into these bits is ignored, and there is no effect on the state of the pins. When
any of the bits are read, the pin state rather than the bit value is read directly. However, when an
A/D converter analog input is being sampled, values of 1 are read out. Table 17.5 summarizes port
G data register read/write operations.
Initial
Bit
Bit Name Value R/W
Description
7 to 4 
All 0 R
Reserved
3
PG3DR
0/1^*
R
2
PG2DR
0/1^*
R
1
PG1DR
0/1^*
R
0
PG0DR
0/1^*
R
These bits are always read as 0.
See table 17.5.
Note: * Initial values are dependent on the state of the external pins.
Table 17.5 Port G Data Register (PGDR) Read/Write Operations
Bits 3 to 0:
Pin I/O
Input
Pin Function
General input
ANn input
Read
Pin state
1
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Rev. 4.00 Dec 05, 2005 page 458 of 564
REJ09B0270-0400