SH7046 Datasheet, PDF (580/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Appendix A Internal I/O Register
Register Name
Abbreviation Bits Address
Module
Access Access
Size
States
Input control/status register 1
Output control/status register
Input control/status register 2
ICSR1
OCSR
ICSR2
16 H'FFFF83C0 MTU
16 H'FFFF83C2
16 H'FFFF83C4 MMT
8, 16, 32
8, 16
8, 16
In Pφ cycles
B: 2
W: 2
L: 4


 H'FFFF83C6 to 

H'FFFF83CC
Port G data register
PGDR
8 H'FFFF83CD I/O
8
In φ cycles
B: 2
W: 2
L: 4


 H'FFFF83CE to 


H'FFFF83CF
Compare match timer start
register
Compare match timer
control/status register_0
CMSTR
16 H'FFFF83D0 CMT
CMCSR_0 16 H'FFFF83D2
8, 16, 32
8, 16
In Pφ cycles
B: 2
W: 2
L: 4
Compare match timer counter_0 CMCNT_0 16 H'FFFF83D4
8, 16, 32
Compare match timer constant CMCOR_0 16 H'FFFF83D6
register_0
8, 16
Compare match timer
control/status register_1
CMCSR_1 16 H'FFFF83D8
8, 16, 32
Compare match timer counter_1 CMCNT_1 16 H'FFFF83DA
8, 16
Compare match timer constant CMCOR_1 16 H'FFFF83DC
register_1
8, 16


 H'FFFF83DE


 H'FFFF83E0 to 


H'FFFF842F
A/D data register 8
A/D data register 9
A/D data register 10
ADDR8
ADDR9
ADDR10
16 H’FFFF8430 A/D
8, 16
16 H’FFFF8432 ^{(channel 0)} 8, 16
16 H’FFFF8434
8, 16
In Pφ cycles
B: 3
W: 6
A/D data register 11
ADDR11
16 H’FFFF8436
8, 16
A/D data register 12
A/D data register 13
ADDR12
ADDR13
16 H’FFFF8438 A/D
8, 16
16 H’FFFF843A ^{(channel 1)} 8, 16
A/D data register 14
ADDR14
16 H’FFFF843C
8, 16
A/D data register 15
ADDR15
16 H’FFFF843E
8, 16
Rev. 4.00 Dec 05, 2005 page 536 of 564
REJ09B0270-0400