SH7046 Datasheet, PDF (463/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 15 Motor Management Timer (MMT)
Buffer Operation Timing: Figure 15.11 shows the compare match buffer operation timing.
Pφ
Compare match
signal
TCNT
N – 1 N N – 1 ^{. . . .} 2Td + 1 2Td 2Td + 1 2Td + 2
TPDR
M0 + 2Td
M1 + 2Td
M2 + 2Td
TPBR
M0
M1
M2
TDDR
Td
TGRUU, TGRVU,
TGRWU
TGRU, TGRV,
TGRW
TGRUD, TGRVD,
TGRWD
L0 + 2Td
L0 + Td
L0
L1 + 2Td
L1 + Td
L1
TBRU, TBRV,
TBRW
L0
L1
Figure 15.11 Buffer Operation Timing
L2 + 2Td
L2 + Td
L2
L2
Rev. 4.00 Dec 05, 2005 page 419 of 564
REJ09B0270-0400