SH7046 Datasheet, PDF (492/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 16 Pin Function Controller (PFC)
16.2 Usage Notes
(1) In this LSI Group, individual functions are available as multiplexed functions on multiple pins.
This approach is intended to increase the number of selectable pin functions and to allow the
easier design of boards.
When the pin function controller (PFC) is used to select a function, only a single pin can be
specified for each function. If one function is specified for two or more pins, the function will
not work properly.
(2) To select a pin function, set the port control registers (PACRL3, PACRL2, PACRL1, PBCR1
and PBCR2) before setting the port I/O registers (PAIORL and PBIOR). To select the function
of the pin which is multiplexed with the port E, the order of setting the port control registers
(PECRH, PECRL1, and PECRL2) and port I/O registers (PEIORH and PEIORL) is not matter.
(3) Regarding the pin in which input/output port is multiplexed with IRQ, when the port input is
changed from low level to IRQ edge detection mode, the corresponding edge is detected.
(4) In a state where the pin is in general I/O mode and set to 1-output (specifically, the port control
register is in general I/O mode and both the port I/O register and the port data register are set to
1), a power-on reset through the RES pin may generate a low level on this pin upon the power-
on state is realized. To prevent this low level from happening, set the port I/O register to 0
(general output) and then apply the power-on reset. Note, however, that no low level may be
generated internally by the power-on reset due to the WDT overflow.
Rev. 4.00 Dec 05, 2005 page 448 of 564
REJ09B0270-0400