SH7046 Datasheet, PDF (510/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 18 Flash Memory (F-ZTAT Version)
Initial
Bit Bit Name Value R/W Description
7
FWE
1/0
R
Flash Write Enable
Reflects the input level at the FWP pin. It is set to 1 when
a low level is input to the FWP pin, and cleared to 0 when
a high level is input.
6
SWE
0
R/W Software Write Enable
When this bit is set to 1 while the FWE bit is 1, flash
memory programming/erasing is enabled. When this bit
is cleared to 0, other FLMCR1 bits and all EBR1 and
EBR2 bits cannot be set.
5
ESU
0
R/W Erase Setup
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to the erase setup state.
When it is cleared to 0, the erase setup state is
cancelled.
4
PSU
0
R/W Program Setup
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to the program setup state.
When it is cleared to 0, the program setup state is
cancelled.
3
EV
0
R/W Erase-Verify
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to erase-verify mode.
When it is cleared to 0, erase-verify mode is cancelled.
2
PV
0
R/W Program-Verify
When this bit is set to 1 while the FWE and SWE bits are
1, the flash memory changes to program-verify mode.
When it is cleared to 0, program-verify mode is cancelled.
1
E
0
R/W Erase
When this bit is set to 1 while the FWE, SWE and ESU
bits are 1, the flash memory changes to erase mode.
When it is cleared to 0, erase mode is cancelled.
0
P
0
R/W Program
When this bit is set to 1 while the FWE, SWE and PSU
bits are 1, the flash memory changes to program mode.
When it is cleared to 0, program mode is cancelled.
Rev. 4.00 Dec 05, 2005 page 466 of 564
REJ09B0270-0400