SH7046 Datasheet, PDF (215/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Initial
Bit Bit Name value R/W
7
SYNC4 0
R/W
6
SYNC3 0
R/W
5 to 3 
All 0 R
2
SYNC2 0
R/W
1
SYNC1 0
R/W
0
SYNC0 0
R/W
Section 10 Multi-Function Timer Pulse Unit (MTU)
Description
Timer Synchro 4 and 3
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at least
two channels must be set to 1. To set synchronous
clearing, in addition to the SYNC bit , the TCNT clearing
source must also be set by means of bits CCLR0 to
CCLR2 in TCR.
0: TCNT_4 and TCNT_3 operate independently (TCNT
presetting/clearing is unrelated to other channels)
1: TCNT_4 and TCNT_3 performs synchronous operation
TCNT synchronous presetting/synchronous clearing is
possible
Reserved
These bits are always read as 0. Only 0 should be written
to these bits.
Timer Synchro 2 to 0
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at least
two channels must be set to 1. To set synchronous
clearing, in addition to the SYNC bit , the TCNT clearing
source must also be set by means of bits CCLR0 to
CCLR2 in TCR.
0: TCNT_2 to TCNT_0 operates independently (TCNT
presetting /clearing is unrelated to other channels)
1: TCNT_2 to TCNT_0 performs synchronous operation
TCNT synchronous presetting/synchronous clearing is
possible
Rev. 4.00 Dec 05, 2005 page 171 of 564
REJ09B0270-0400