SH7046 Datasheet, PDF (483/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 16 Pin Function Controller (PFC)
16.1.1 Port A I/O Register L (PAIORL)
The port A I/O register L (PAIORL) is a 16-bit readable/writable register that is used to set the
pins on port A as inputs or outputs. Bits PA15IOR to PA0IOR correspond to pins PA15 to PA0
(names of multiplexed pins are here given as port names and pin numbers alone). PAIORL is
enabled when the port A pins are functioning as general-purpose inputs/outputs (PA15 to PA0),
SCK2 and SCK3 pins are functioning as inputs/outputs of SCI, and PCIO pins are functioning as
an input/output of MMT. In other states, PAIORL is disabled.
A given pin on port A will be an output pin if the corresponding bit in PAIORL is set to 1, and an
input pin if the bit is cleared to 0.
The initial value of PAIORL is H'0000.
16.1.2 Port A Control Registers L3 to L1 (PACRL3 to PACRL1)
The port A control registers L3 to L1 (PACRL3 to PACRL1) are 16-bit readable/writable registers
that are used to select the functions of the multiplexed pins on port A.
Port A Control Registers L3 to L1 (PACRL3 to PACRL1)
Register Bit
PACRL3 15
PACRL1 15
PACRL1 14
PACRL3 14
PACRL1 13
PACRL1 12
PACRL3 13
PACRL1 11
PACRL1 10
Initial
Bit Name Value R/W
PA15MD2 0
R/W
PA15MD1 0
R/W
PA15MD0 0
R/W
PA14MD2 0
R/W
PA14MD1 0
R/W
PA14MD0 0
R/W
PA13MD2 0
R/W
PA13MD1 0
R/W
PA13MD0 0
R/W
Description
PA15 Mode
Select the function of the PA15/POE6 pin.
000: PA15 I/O (port)
011: Setting prohibited
001: Setting prohibited 1xx: Setting prohibited
010: POE6 input (port)
PA14 Mode
Select the function of the PA14/POE5 pin.
000: PA14 I/O (port)
011: Setting prohibited
001: Setting prohibited 1xx: Setting prohibited
010: POE5 input (port)
PA13 Mode
Select the function of the PA13/POE4 pin.
000: PA13 I/O (port)
011: Setting prohibited
001: Setting prohibited 1xx: Setting prohibited
010: POE4 input (port)
Rev. 4.00 Dec 05, 2005 page 439 of 564
REJ09B0270-0400