SH7046 Datasheet, PDF (272/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 10 Multi-Function Timer Pulse Unit (MTU)
Counter Clearing by another Channel: In complementary PWM mode, by setting a mode for
synchronization with another channel by means of the timer synchro register (TSYR), and
selecting synchronous clearing with bits CCLR2–CCLR0 in the timer control register (TCR), it is
possible to have TCNT_3, TCNT_4, and TCNTS cleared by another channel.
Figure 10.49 illustrates the operation.
Use of this function enables counter clearing and restarting to be performed by means of an
external signal.
TGRA_3
TCDR
TCNT_3
TCNT_4
TDDR
H'0000
Channel 1
Input capture A
TCNTS
TCNT_1
Synchronous counter clearing by channel 1 input capture A
Figure 10.49 Counter Clearing Synchronized with Another Channel
Rev. 4.00 Dec 05, 2005 page 228 of 564
REJ09B0270-0400