SH7046 Datasheet, PDF (109/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 5 Exception Processing
5.7 Stack Status after Exception Processing Ends
The status of the stack after exception processing ends is shown in table 5.11.
Table 5.11 Stack Status after Exception Processing Ends
Types
Address error
Stack Status
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Trap instruction
SP
Address of instruction
after TRAPA instruction
32 bits
SR
32 bits
General illegal instruction
SP ^{Agedndereraslsilolefginasl tirnuscttriuocntioanfter32} bits
SR
32 bits
Interrupt
SP
Address of instruction
after executed instruction
32 bits
SR
32 bits
Illegal slot instruction
SP
Jump destination address
of delay branch instruction
32 bits
SR
32 bits
Rev. 4.00 Dec 05, 2005 page 65 of 564
REJ09B0270-0400