SH7046 Datasheet, PDF (602/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Appendix B Pin States
Pin Function
Pin State
Reset State
Power-Down State
Type
Pin Name
Power-On
Single-Chip
Manual
Software
Standby
Sleep
Port control
POE0 to POE6
Z
I
Z
I
SCI
SCK2, SCK3
Z
I/O
Z
I/O
RXD2, RXD3
Z
I
Z
I
TXD2, TXD3
Z
O
O^*1
O
A/D converter AN8 to AN19
Z
I
Z
I
I/O port
ADTRG
PA0 to PA15
Z
I
Z
I
Z
I/O
K^*1
I/O
PB0 to PB5
PE0 to PE8, PE10
PE9, PE11 to PE21
Z
I/O
Z^*2
I/O
PF0 to PF15
Z
I
Z
I
UBC
PG0 to PG3
UBCTRG
Z
I
Z
I
Z
O
O^*1
O
Legend:
I: Input
O: Output
H: High-level output
L: Low-level output
Z: High impedance
K: Input pins become high-impedance, and output pins retain their state.
Notes: 1. When the HIZ bit in SBYCR is set to 1, the output pins enter their high-impedance state.
2. Those pins multiplexed with large-current pins unconditionally enter their high-
impedance state.
3. This pin operates as an input pin during a power-on reset. This pin should be pulled up
to avoid mulfunction.
4. This pin operates as an input pin when the IRQEL bit in SBYCR is cleared to 0.
Rev. 4.00 Dec 05, 2005 page 558 of 564
REJ09B0270-0400