SH7046 Datasheet, PDF (26/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

12.6.3 Serial data transmission (Clocked Synchronous mode) ....................................... 358
12.6.4 Serial data reception (Clocked Synchronous mode) ............................................ 361
12.6.5 Simultaneous Serial Data Transmission and Reception
(Clocked Synchronous mode).............................................................................. 363
12.7 SCI Interrupts.................................................................................................................... 365
12.7.1 Interrupts in Normal Serial Communication Interface Mode .............................. 365
12.8 Usage Notes ...................................................................................................................... 366
12.8.1 TDR Write and TDRE Flag ................................................................................. 366
12.8.2 Module Standby Mode Setting ............................................................................ 366
12.8.3 Break Detection and Processing (Asynchronous Mode Only)............................. 366
12.8.4 Sending a Break Signal (Asynchronous Mode Only) .......................................... 366
12.8.5 Receive Error Flags and Transmit Operations
(Clocked Synchronous Mode Only) .................................................................... 367
12.8.6 Constraints on DTC Use ...................................................................................... 367
12.8.7 Cautions on Clocked Synchronous External Clock Mode ................................... 367
12.8.8 Caution on Clocked Synchronous Internal Clock Mode...................................... 367
Section 13 A/D Converter................................................................................................. 369
13.1 Features ............................................................................................................................. 369
13.2 Input/Output Pins .............................................................................................................. 371
13.3 Register Description.......................................................................................................... 372
13.3.1 A/D Data Registers 8 to 19 (ADDR8 to ADDR19) ............................................. 372
13.3.2 A/D Control/Status Registers 0 to 2 (ADCSR_0 to ADCSR_2).......................... 373
13.3.3 A/D Control Registers_0 to 2 (ADCR_0 to ADCR_2)........................................ 374
13.3.4 A/D Trigger Select Register (ADTSR) ................................................................ 376
13.4 Operation .......................................................................................................................... 377
13.4.1 Single Mode......................................................................................................... 377
13.4.2 Continuous Scan Mode ........................................................................................ 378
13.4.3 Single-Cycle Scan Mode...................................................................................... 378
13.4.4 Input Sampling and A/D Conversion Time ......................................................... 379
13.4.5 A/D Converter Activation by MTU or MMT ...................................................... 380
13.4.6 External Trigger Input Timing............................................................................. 380
13.5 Interrupt Sources and DTC Transfer Requests.................................................................. 381
13.6 Definitions of A/D Conversion Accuracy......................................................................... 382
13.7 Usage Notes ...................................................................................................................... 384
13.7.1 Module Standby Mode Setting ............................................................................ 384
13.7.2 Permissible Signal Source Impedance ................................................................. 384
13.7.3 Influences on Absolute Accuracy ........................................................................ 384
13.7.4 Range of Analog Power Supply and Other Pin Settings ...................................... 385
13.7.5 Notes on Board Design ........................................................................................ 385
13.7.6 Notes on Noise Countermeasures ........................................................................ 385
Rev. 4.00 Dec 05, 2005 page xxvi of xliv