SH7046 Datasheet, PDF (110/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 5 Exception Processing
5.8 Usage Notes
5.8.1 Value of Stack Pointer (SP)
The value of the stack pointer must always be a multiple of four. If it is not, an address error will
occur when the stack is accessed during exception processing.
5.8.2 Value of Vector Base Register (VBR)
The value of the vector base register must always be a multiple of four. If it is not, an address error
will occur when the stack is accessed during exception processing.
5.8.3 Address Errors Caused by Stacking of Address Error Exception Processing
When the value of the stack pointer is not a multiple of four, an address error will occur during
stacking of the exception processing (interrupts, etc.) and address error exception processing will
start after the first exception processing is ended. Address errors will also occur in the stacking for
this address error exception processing. To ensure that address error exception processing does not
go into an endless loop, no address errors are accepted at that point. This allows program control
to be shifted to the service routine for address error exception and enables error processing.
When an address error occurs during exception processing stacking, the stacking bus cycle (write)
is executed. During stacking of the status register (SR) and program counter (PC), the value of SP
is reduced by 4 for both of SR and PC, therefore the value of SP is still not a multiple of four after
the stacking. The address value output during stacking is the SP value, so the address itself where
the error occurred is output. This means that the write data stacked is undefined.
Rev. 4.00 Dec 05, 2005 page 66 of 564
REJ09B0270-0400