SH7046 Datasheet, PDF (605/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Index
Index
A/D converter ......................................... 369
A/D conversion time........................... 379
Continuous scan mode ........................ 378
Single mode ........................................ 377
Single-cycle scan ................................ 378
Absolute maximum ratings..................... 507
Address map ............................................. 42
Addressing modes..................................... 17
Bus state controller ................................. 129
Clock mode............................................... 40
Clock pulse generator ............................... 47
Crystal oscillator ................................... 47
External clock ....................................... 48
Compare match timer ............................. 387
Control registers........................................ 11
Global Base Register (GBR)................. 11
Status Register (SR).............................. 11
Vector Base Register (VBR)................. 11
Data Formats............................................. 13
Byte....................................................... 13
Longword.............................................. 13
Word ..................................................... 13
Data transfer controller ........................... 105
Block Transfer Mode .......................... 120
Chain Transfer .................................... 122
DTC vector table................................. 115
DTC with interrupt activation............. 125
DTC with software activation ............. 125
Normal Mode...................................... 119
Repeat Mode....................................... 119
Delayed branch instructions...................... 15
Exception processing ................................ 53
Exception processing vector table
Address error exception processing ...... 60
General illegal instruction exception
processing .............................................63
Illegal slot exception processing ...........63
Interrupt exception processing ..............61
Manual reset..........................................58
Power-on reset.......................................57
Trap instruction exception processing...62
Exception processing Vector table............55
Flash memory..........................................459
Boot mode...........................................471
Error protection ...................................481
Flash Memory Emulation in RAM......474
Hardware protection............................480
Programmer mode...............................482
Software protection .............................480
User program mode.............................473
General registers .........................................9
I/O Ports ..................................................449
Interrupt controller ....................................67
Interrupt response time..........................85
IRQ interrupts .......................................77
NMI interrupt ........................................77
User break interrupt ..............................78
Vector numbers .....................................79
Vector table ...........................................79
Mask ROM..............................................489
Motor Management Timer ......................397
High-impedance state..........................426
Multi-function timer pulse unit ...............133
Buffer operation ..................................185
Cascaded operation .............................189
Compare match ...................................180
Free-running counters .........................179
High-impedance state..........................293
Rev. 4.00 Dec 05, 2005 page 561 of 564
REJ09B0270-0400