SH7046 Datasheet, PDF (163/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 8 Data Transfer Controller (DTC)
Normal Mode: Performs the transfer of one byte, one word, or one longword for each activation.
The total transfer count is 1 to 65536. Once the specified number of transfers have ended, a CPU
interrupt can be requested.
Table 8.2 Normal Mode Register Functions
Register
DTMR
DTCRA
DTSAR
DTDAR
Values Written Back upon a Transfer Information Write
Function
When DTCRA is other than 1 When DTCRA is 1
Operation mode
control
DTMR
DTMR
Transfer count
DTCRA – 1
DTCRA – 1 (= H'0000)
Transfer source
address
Increment/decrement/fixed
Increment/decrement/fixed
Transfer destination Increment/decrement/fixed
address
Increment/decrement/fixed
DTSAR
Transfer
DTDAR
Figure 8.6 Memory Mapping in Normal Mode
Repeat Mode: Performs the transfer of one byte, one word, or one longword for each activation.
Either the transfer source or transfer destination is designated as the repeat area. Table 8.3 lists the
register information in repeat mode.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Rev. 4.00 Dec 05, 2005 page 119 of 564
REJ09B0270-0400