SH7046 Datasheet, PDF (114/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 6 Interrupt Controller (INTC)
6.3.1 Interrupt Control Register 1 (ICR1)
ICR1 is a 16-bit register that sets the input signal detection mode of the external interrupt input
pins NMI and IRQ0 to IRQ3 and indicates the input signal level at the NMI pin.
Initial
Bit Bit Name Value R/W
15 NMIL
1/0
R
14 to 
9
8
NMIE
All 0 R
0
R/W
7
IRQ0S
0
R/W
6
IRQ1S
0
R/W
Description
NMI Input Level
Sets the level of the signal input to the NMI pin. This bit
can be read to determine the NMI pin level. This bit
cannot be modified.
0: NMI input level is low
1: NMI input level is high
Reserved
These bits are always read as 0. The write value should
always be 0.
NMI Edge Select
0: Interrupt request is detected on falling edge of NMI
input
1: Interrupt request is detected on rising edge of NMI
input
IRQ0 Sense Select
This bit sets the IRQ0 interrupt request detection mode.
0: Interrupt request is detected on low level of IRQ0
input
1: Interrupt request is detected on edge of IRQ0 input
(edge direction is selected by ICR2)
IRQ1 Sense Select
This bit sets the IRQ1 interrupt request detection mode.
0: Interrupt request is detected on low level of IRQ1
input
1: Interrupt request is detected on edge of IRQ1 input
(edge direction is selected by ICR2)
Rev. 4.00 Dec 05, 2005 page 70 of 564
REJ09B0270-0400