SH7046 Datasheet, PDF (219/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Initial
Bit Bit Name value R/W
7

0
R
6
BDC
0
R/W
5
N
0
R/W
4
P
0
R/W
3
FB
0
R/W
2
WF
1
VF
0
UF
0
R/W
0
R/W
0
R/W
Section 10 Multi-Function Timer Pulse Unit (MTU)
Description
Reserved
This bit is always read as 1. Only 1 should be written to
this bit.
Brushless DC Motor
This bit selects whether to make the functions of this
register (TGCR) effective or ineffective.
0: Ordinary output
1: Functions of this register are made effective
Reverse Phase Output (N) Control
This bit selects whether the level output or the reset-
synchronized PWM/complementary PWM output while the
reverse pins (TIOC3D, TIOC4C, and TIOC4D) are on-
output.
0: Level output
1: Reset synchronized PWM/complementary PWM output
Positive Phase Output (P) Control
This bit selects whether the level output or the reset-
synchronized PWM/complementary PWM output while the
positive pin (TIOC3B, TIOC4A, and TIOC4B) are on-
output.
0: Level output
1: Reset synchronized PWM/complementary PWM output
External Feedback Signal Enable
This bit selects whether the switching of the output of the
positive/reverse phase is carried out automatically with the
MTU/channel 0 TGRA, TGRB, TGRC input capture
signals or by writing 0 or 1 to bits 2 to 0 in TGCR.
0: Output switching is carried out by external input (Input
sources are channel 0 TGRA, TGRB, TGRC input
capture signal)
1: Output switching is carried out by software (TGCR's UF,
VF, WF settings).
Output Phase Switch 2 to 0
These bits set the positive phase/negative phase output
phase on or off state. The setting of these bits is valid
only when the FB bit in this register is set to 1. In this
case, the setting of bits 2 to 0 is a substitute for external
input. See table 10.28.
Rev. 4.00 Dec 05, 2005 page 175 of 564
REJ09B0270-0400