SH7046 Datasheet, PDF (220/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 10 Multi-Function Timer Pulse Unit (MTU)
Table 10.28 Output level Select Function
Bit 2
WF
0
1
Bit 1
VF
0
1
0
1
Bit 0
UF
0
1
0
1
0
1
0
1
TIOC3B
U Phase
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
TIOC4A
V Phase
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
Function
TIOC4B TIOC3D
W Phase U Phase
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
ON
ON
OFF
OFF
TIOC4C
V Phase
OFF
OFF
OFF
OFF
ON
ON
OFF
OFF
TIOC4D
W Phase
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
10.3.13 Timer Subcounter (TCNTS)
TCNTS is a 16-bit read-only counter that is used only in complementary PWM mode. The initial
value is H’0000.
Note: Accessing the TCNTS in 8-bit units is prohibited. Always access in 16-bit units.
10.3.14 Timer Dead Time Data Register (TDDR)
TDDR is a 16-bit register, used only in complementary PWM mode, that specifies the TCNT_3
and TCNT_4 counter offset values. In complementary PWM mode, when the TCNT_3 and
TCNT_4 counters are cleared and then restarted, the TDDR register value is loaded into the
TCNT_3 counter and the count operation starts. The initial value is H'FFFF.
Note: Accessing the TDDR in 8-bit units is prohibited. Always access in 16-bit units.
10.3.15 Timer Period Data Register (TCDR)
TCDR is a 16-bit register used only in complementary PWM mode. Set half the PWM carrier
sync value as the TCDR register value. This register is constantly compared with the TCNTS
counter in complementary PWM mode, and when a match occurs, the TCNTS counter switches
direction (decrement to increment). The initial value is H'FFFF.
Note: Accessing the TCDR in 8-bit units is prohibited. Always access in 16-bit units.
Rev. 4.00 Dec 05, 2005 page 176 of 564
REJ09B0270-0400