SH7046 Datasheet, PDF (431/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 14 Compare Match Timer (CMT)
Section 14 Compare Match Timer (CMT)
This LSI has an on-chip compare match timer (CMT) comprising two 16-bit timer channels. The
CMT has 16-bit counters and can generate interrupts at set intervals.
14.1 Features
The CMT has the following features:
• Four types of counter input clock can be selected
 One of four internal clocks (Pφ/8, Pφ/32, Pφ/128, Pφ/512) can be selected independently
for each channel.
• Interrupt sources
 A compare match interrupt can be requested independently for each channel.
• Module standby mode can be set
Figure 14.1 shows a block diagram of the CMT.
CMI0
Pφ/32 Pφ/512
Pφ/8 Pφ/128
CMI1
Pφ/32 Pφ/512
Pφ/8 Pφ/128
Control circuit
Clock selection
Control circuit
Clock selection
Module bus
Legend:
CMSTR: Compare match timer start register
CMCSR: Compare match timer control/status register
CMCOR: Compare match timer constant register
CMCNT: Compare match timer counter
CMI:
Compare match interrupt
CMT
Bus
interface
Internal bus
TIMCMT0A_000020010100
Figure 14.1 CMT Block Diagram
Rev. 4.00 Dec 05, 2005 page 387 of 564
REJ09B0270-0400