SH7046 Datasheet, PDF (534/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 19 Mask ROM
The operating mode determines whether the on-chip ROM is valid or not. The operating mode is
selected using mode-setting pins FWP and MD3 to MD0 as shown in table 3.1. Only the mode 3 is
supported in this LSI. The on-chip ROM is allocated to addresses H'00000000 to H'0000FFFF of
memory area 0 (SH7148), H'00000000 to H'0001FFFF of memory area 0 (SH7048).
19.1 Usage Note
• Setting module standby mode
For mask ROM, this module can be disabled/enabled by the module standby control register.
Mask ROM operation is enabled for the initial value. Accessing mask ROM is disabled by
setting module standby mode. For more information, see section 21, Power-Down Modes.
Rev. 4.00 Dec 05, 2005 page 490 of 564
REJ09B0270-0400