SH7046 Datasheet, PDF (459/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

TPDR
Section 15 Motor Management Timer (MMT)
TCNT
2Td
H'0000
PCIO pin
(toggle output)
Figure 15.7 Example of Toggle Output Waveform Synchronized with PWM Cycle
Settings for A/D Start-Conversion Requests: Requests to start A/D conversion can be set up to
be issued when TCNT matches TPDR or 2Td. When the start requests are set up for issue when
TCNT matches TPDR, A/D conversion will start at the center of the PWM pulse (the peak value
of the TCNT counter). When the start requests are set up for issue when TCNT matches 2Td, A/D
conversion will start on the edge of the PWM pulse (the minimum value of the TCNT counter).
Requests to start A/D conversion is enabled by setting the bit TTGE in the timer control register
(TCNR) to 1.
Table 15.3 shows the relationship between A/D conversion start timing and operating mode.
Table 15.3 Relationship between A/D Conversion Start Timing and Operating Mode
Operating mode
Operating mode 1 (transfer at peak)
Operating mode 2 (transfer at bottom)
Operating mode 3 (transfer at peak and valley)
A/D conversion start timing
A/D conversion start at bottom
A/D conversion start at peak
A/D conversion start at peak and bottom
Rev. 4.00 Dec 05, 2005 page 415 of 564
REJ09B0270-0400