SH7046 Datasheet, PDF (524/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 18 Flash Memory (F-ZTAT Version)
18.9 Program/Erase Protection
There are three kinds of flash memory program/erase protection; hardware protection, software
protection, and error protection.
18.9.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Flash memory control register 1 (FLMCR1), flash memory control register 2
(FLMCR2), erase block register 1 (EBR1), and erase block register 2 (EBR2) are initialized
Item
FWP pin protect
Reset/standby
protect
Protect Function
Description
Program Erase
When a high level is input to the FWP pin, FLMCR1, Yes
Yes
EBR 1, and EBR 2 are initialized, and the
program/erase protection state is entered.
In the reset state (including the reset state when the Yes
Yes
WDT overflows) and standby mode, FLMCR1, EBR
1, and EBR 2 are initialized, and the program/erase
protection state is entered.
In a reset via the RES pin, the reset state is not
entered unless the RES pin is held low until
oscillation stabilizes after powering on. In the case
of a reset during operation, hold the RES pin low for
the RES pulse width specified in the AC
Characteristics section.
18.9.2 Software Protection
Software protection can be implemented against programming/erasing of all flash memory blocks
by clearing the SWE bit in FLMCR1. When software protection is in effect, setting the P or E bit
in FLMCR1 does not cause a transition to program mode or erase mode. By setting the erase
block register 1 (EBR1), erase protection can be set for individual blocks. When EBR1 is set to
H’00, erase protection is set for all blocks.
Rev. 4.00 Dec 05, 2005 page 480 of 564
REJ09B0270-0400