SH7046 Datasheet, PDF (291/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 10 Multi-Function Timer Pulse Unit (MTU)
10.7.5 Contention between TCNT Write and Increment Operations
If incrementing occurs in the T2 state of a TCNT write cycle, the TCNT write takes precedence
and TCNT is not incremented.
Figure 10.72 shows the timing in this case.
Pφ
Address
Write signal
TCNT input
clock
TCNT
TCNT write cycle
T1 T2
TCNT address
N
M
TCNT write data
Figure 10.72 Contention between TCNT Write and Increment Operations
Rev. 4.00 Dec 05, 2005 page 247 of 564
REJ09B0270-0400