SH7046 Datasheet, PDF (470/611 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7046 Series

Section 15 Motor Management Timer (MMT)
15.8 Port Output Enable (POE)
The port output enable (POE) circuit enables the MMT’s output pins (POUA, POUB, POVA,
POVB, POWA, and POWB) to be placed in the high-impedance state by varying the input to pins
POE4 to POE6. An interrupt can also be requested at the same time.
In addition, the MMT’s output pins will also enter the high-impedance state in standby mode or
when the oscillator halts.
15.8.1 Features
The POE circuit has the following features:
• Falling edge, Pφ/8 × 16 times, Pφ/16 × 16 times, or Pφ/128 × 16 times low-level sampling can
be set for each of input pins POE4 to POE6.
• The MMT’s output pins can be placed in the high-impedance state at the falling edge or low-
level sampling of pins POE4 to POE6.
• An interrupt can be generated by input level sampling.
POE6
POE5
POE4
ICSR2
Input level detection circuit
Falling edge
detection circuit
Low level
detection circuit
High impedance request
control signal
Interrupt request
(MMTPOE)
Pφ/8 Pφ/16 Pφ/128
Figure 15.18 Block Diagram of POE
Rev. 4.00 Dec 05, 2005 page 426 of 564
REJ09B0270-0400