MC9S12G Datasheet, PDF (767/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

48 KByte Flash Module (S12FTMRG48K1V1)
Table 23-6. Memory Controller Resource Fields (NVMRES¹=1)
Global Address
Size
(Bytes)
Description
0x0_4000 – 0x040FF
256 P-Flash IFR (see Table 23-5)
0x0_4100 – 0x0_41FF
256 Reserved.
0x0_4200 – 0x0_57FF
Reserved
0x0_5800 – 0x0_59FF
512 Reserved
0x0_5A00 – 0x0_5FFF 1,536 Reserved
0x0_6000 – 0x0_6BFF 3,072 Reserved
0x0_6C00 – 0x0_7FFF 5,120 Reserved
1 _{NVMRES - See Section 23.4.3 for NVMRES (NVM Resource) detail.}
0x0_4000
0x0_4400
RAM Start = 0x0_5800
RAM End = 0x0_59FF
P-Flash IFR 1 Kbyte (NVMRES=1)
Reserved 5k bytes
Reserved 512 bytes
0x0_6C00
0x0_7FFF
Reserved 4608 bytes
Reserved 5120 bytes
Figure 23-3. Memory Controller Resource Memory Map (NVMRES=1)
23.3.2 Register Descriptions
The Flash module contains a set of 20 control and status registers located between Flash module base +
0x0000 and 0x0013.
In the case of the writable registers, the write accesses are forbidden during Fash command execution (for
more detail, see Caution note in Section 23.3).
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
767
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.