MC9S12G Datasheet, PDF (658/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Timer Module (TIM16B8CV3)
Table 20-25. TIM16B8CV1 Interrupts
Interrupt
Offset¹ Vector¹ Priority¹
Source
C[7:0]F³
—
—
PAOVI²
—
—
PAOVF²
—
—
—
Timer Channel 7–0
—
Pulse Accumulator
Input
—
Pulse Accumulator
Overflow
TOF
—
—
—
Timer Overflow
1 _{Chip Dependent.}
2 _{This feature is available only when channel 7 exists.}
3 _{Bits related to available channels have functional significance}
Description
Active high timer channel interrupts 7–0
Active high pulse accumulator input interrupt
Pulse accumulator overflow interrupt
Timer Overflow interrupt
The TIM16B8CV3 could use up to 11 interrupt vectors. The interrupt vector offsets and interrupt numbers
are chip dependent.
20.6.1 Channel [7:0] Interrupt (C[7:0]F)
This active high outputs will be asserted by the module to request a timer channel 7 – 0 interrupt. The TIM
block only generates the interrupt and does not service it. Only bits related to implemented channels are
valid.
20.6.2 Pulse Accumulator Input Interrupt (PAOVI)
This interrupt is available only when channel 7 exists. This active high output will be asserted by the
module to request a timer pulse accumulator input interrupt. The TIM block only generates the interrupt
and does not service it.
20.6.3 Pulse Accumulator Overflow Interrupt (PAOVF)
This interrupt is available only when channel 7 exists. This active high output will be asserted by the
module to request a timer pulse accumulator overflow interrupt. The TIM block only generates the
interrupt and does not service it.
20.6.4 Timer Overflow Interrupt (TOF)
This active high output will be asserted by the module to request a timer overflow interrupt. The TIM block
only generates the interrupt and does not service it.
MC9S12G Family Reference Manual, Rev.1.01
658
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.