MC9S12G Datasheet, PDF (121/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

2.1.4 Block Diagram
Figure 2-1. Block Diagram
Port Integration Module (S12GPIMV0)
n
1
0
Peripheral
Module
PIM
Ports
Pin Enable, Data
Data
Control
PIM
Routing _Data
Pin Enable, Data
Control
Package Code
Pin Routing (20 TSSOP only)
Pin #0
Pin #n
2.2 PIM Routing - External Signal Description
This section lists and describes the signals that do connect off-chip.
Table 2-3 shows the availability of I/O port pins for each group in the largest offered package option.
Table 2-3. Port Pin Availability (in largest package) per Device
Device Group
Port
G1
G2
G3
(100 pin)
(64 pin)
(48 pin)
A
7-0
-
-
B
7-0
-
-
C
7-0
-
-
D
7-0
-
-
E
1-0
1-0
1-0
T
7-0
7-0
5-0
S
7-0
7-0
7-0
M
3-0
3-0
1-0
P
7-0
7-0
5-0
J
7-0
7-0
3-0
AD
15-0
15-0
11-0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
121
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.