MC9S12G Datasheet, PDF (584/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Serial Communication Interface (S12SCIV5)
18.4.5 Transmitter
Internal Bus
Bus
Clock
Baud Divider
÷ 16
SCI Data Registers
SBR12:SBR0
11-Bit Transmit Register
M
H8 7 6 5 4 3 2 1 0 L
TXPOL
SCTXD
PE
PT
TDRE IRQ
TC IRQ
T8
Parity
Generation
TIE
TDRE
TC
TCIE
LOOP
CONTROL
To Receiver
LOOPS
RSRC
Transmitter Control
TE
SBK BERRM[1:0]
BER IRQ
BERRIF
TCIE
Transmit
Collision Detect
Figure 18-16. Transmitter Block Diagram
SCTXD
SCRXD
(From Receiver)
18.4.5.1 Transmitter Character Length
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
18.4.5.2 Character Transmission
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the TXD pin, after it has prefaced them with a start bit and appended them with a stop bit. The SCI data
registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the transmit
shift register.
MC9S12G Family Reference Manual, Rev.1.01
584
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.