MC9S12G Datasheet, PDF (379/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Analog-to-Digital Converter (ADC10B8CV2)
Address Name
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
R
ATDCTL3
W
R
ATDCTL4
W
R
ATDCTL5
W
R
ATDSTAT0
W
Unimple- R
mented W
R
ATDCMPEH _W
0x0009
0x000A
0x000B
0x000C
R
ATDCMPEL
W
R
ATDSTAT2H
W
ATDSTAT2L ^R
W
R
ATDDIENH _W
R
0x000D ATDDIENL
W
R
0x000E ATDCMPHTH _W
R
0x000F ATDCMPHTL
W
0x0010
R
ATDDR0 _W
0x0012
R
ATDDR1
W
0x0014
R
ATDDR2
W
0x0016
R
ATDDR3
W
0x0018
R
ATDDR4
W
0x001A
R
ATDDR5
W
0x001C
R
ATDDR6
W
0x001E
ATDDR7 ^R
W
0x0020 - Unimple- ^R
0x002F mented W
Bit 7
DJM
SMP2
0
SCF
0
0
0
1
0
0
6
5
4
S8C
S4C
S2C
SMP1 SMP0
SC
SCAN MULT
0
ETORF FIFOR
0
0
0
0
0
0
3
S1C
CD
CC3
0
0
2
FIFO
1
FRZ1
PRS[4:0]
CC
CC2
CB
CC1
0
0
0
0
CMPE[7:0]
0
0
0
0
0
0
CCF[7:0]
1
1
1
1
1
1
IEN[7:0]
0
0
0
0
0
0
CMPHT[7:0]
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 11.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 11.3.2.12.2, “Right Justified Result Data (DJM=1)”
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-2. ADC10B8C Register Summary (Sheet 2 of 2)
Bit 0
FRZ0
CA
CC0
0
0
0
1
0
0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
379
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.