MC9S12G Datasheet, PDF (175/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
2.4.3.15 Port T Data Register (PTT)
Address 0x0240 (G1, G2)
7
R
PTT7
W
Reset
0
Address 0x0240 (G3)
6
PTT6
0
5
PTT5
0
4
PTT4
0
3
PTT3
0
2
PTT2
0
7
R
0
W
6
5
4
3
2
0
PTT5
PTT4
PTT3
PTT2
Reset
0
0
0
0
0
0
Figure 2-16. Port T Data Register (PTT)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PTT1
PTT0
0
0
Access: User read/write¹
1
0
PTT1
PTT0
0
0
Field
7-0
PTT
Table 2-35. PTT Register Field Descriptions
Description
Port T general-purpose input/output data—Data Register
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
2.4.3.16 Port T Input Register (PTIT)
Address 0x0241 (G1, G2)
7
R PTIT7
W
Reset
0
Address 0x0241 (G3)
6
PTIT6
0
7
6
R
0
0
W
Reset
0
0
1 _{Read: Anytime}
Write:Never
5
PTIT5
0
4
PTIT4
0
3
PTIT3
0
2
PTIT2
0
5
PTIT5
4
PTIT4
3
PTIT3
2
PTIT2
0
0
0
0
Figure 2-17. Port T Input Register (PTIT)
Access: User read only¹
1
PTIT1
0
PTIT0
0
0
Access: User read only¹
1
PTIT1
0
PTIT0
0
0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
175
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.