MC9S12G Datasheet, PDF (202/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Address 0x0277 (G(A)240 and G(A)192 only)
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
Address 0x0277 (non G(A)240 and G(A)192)
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
0
0
0
0
0
0
Figure 2-55. Pin Routing Register (PRR1)
Access: User read/write¹
1
0
0
PRR1AN
0
0
Access: User read/write
1
0
0
0
0
0
Table 2-82. PRR1 Register Field Descriptions
Field
Description
0
PRR1AN
Pin Routing Register ADC channels — Select alternative routing for AN15/14/13/11/10 pins to port C
This bit programs the routing of the specific ADC channels to alternative external pins in 100 LQFP. See Table 2-83.
The routing affects the analog signals and digital input trigger paths to the ADC. Refer to the related pin descriptions
in Section 2.3.4, “Pins PC7-0” and Section 2.3.12, “Pins AD15-0”.
1 AN inputs on port C
0 AN inputs on port AD
Table 2-83. AN Routing Options
PRR1AN
0
1
Associated Pins
AN10 - PAD10
AN11 - PAD11
AN13 - PAD13
AN14 - PAD14
AN15 - PAD15
AN10 - PC0
AN11 - PC1
AN13 - PC2
AN14 - PC3
AN15 - PC4
MC9S12G Family Reference Manual, Rev.1.01
202
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.