MC9S12G Datasheet, PDF (569/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Serial Communication Interface (S12SCIV5)
Register
Name
Bit 7
6
5
4
3
2
0x0006
R
R8
0
0
0
0
SCIDRH _W
T8
0x0007
R
R7
R6
R5
R4
R3
R2
SCIDRL _W
T7
T6
T5
T4
T3
T2
1.These registers are accessible if the AMAP bit in the SCISR2 register is set to zero.
2,These registers are accessible if the AMAP bit in the SCISR2 register is set to one.
= Unimplemented or Reserved
Figure 18-2. SCI Register Summary (Sheet 2 of 2)
1
Bit 0
0
0
R1
R0
T1
T0
18.3.2.1 SCI Baud Rate Registers (SCIBDH, SCIBDL)
Module Base + 0x0000
R
W
Reset
7
IREN
0
6
TNP1
5
TNP0
4
SBR12
3
SBR11
2
SBR10
0
0
0
0
0
Figure 18-3. SCI Baud Rate Register (SCIBDH)
1
SBR9
0
0
SBR8
0
Module Base + 0x0001
R
W
Reset
7
SBR7
0
6
SBR6
5
SBR5
4
SBR4
3
SBR3
2
SBR2
0
0
0
0
1
Figure 18-4. SCI Baud Rate Register (SCIBDL)
1
SBR1
0
0
SBR0
0
Read: Anytime, if AMAP = 0. If only SCIBDH is written to, a read will not return the correct data until
SCIBDL is written to as well, following a write to SCIBDH.
Write: Anytime, if AMAP = 0.
NOTE
Those two registers are only visible in the memory map if AMAP = 0 (reset
condition).
The SCI baud rate register is used by to determine the baud rate of the SCI, and to control the infrared
modulation/demodulation submodule.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
569
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.