MC9S12G Datasheet, PDF (1132/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Detailed Register Address Map
0x0100–0x0113 Flash Module (FTMRG)
Address
0x0107
0x0108
0x0109
0x010A
0x010B
0x010C
0x010D
0x010E
0x010F
0x0110
0x0111
0x0112
0x0113
Name
FERSTAT
FPROT
DFPROT
FCCOBHI
FCCOBLO
Reserved
Reserved
Reserved
Reserved
FOPT
Reserved
Reserved
Reserved
Bit 7
R
0
W
R
FPOPEN
W
R
DPOPEN
W
R
CCOB15
W
R
CCOB7
W
R
0
W
R
0
W
R
0
W
R
0
W
R NV7
W
R
0
W
R
0
W
R
0
W
Bit 6
0
RNV6
0
CCOB14
CCOB6
0
0
0
0
NV6
0
0
0
Bit 5
0
FPHDIS
0
CCOB13
CCOB5
0
0
0
0
NV5
0
0
0
Bit 4
0
FPHS1
0
CCOB12
CCOB4
0
0
0
0
NV4
0
0
0
Bit 3
0
FPHS0
DPS3
CCOB11
CCOB3
0
0
0
0
NV3
0
0
0
Bit 2
0
FPLDIS
DPS2
CCOB10
CCOB2
0
0
0
0
NV2
0
0
0
Bit 1
DFDIF
FPLS1
DPS1
CCOB9
CCOB1
0
0
0
0
NV1
0
0
0
Bit 0
SFDIF
FPLS0
DPS0
CCOB8
CCOB0
0
0
0
0
NV0
0
0
0
0x0114–0x11F Reserved
Address Name
Bit 7
0x0114-
0x011F
R
Reserved
W
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
0x0120 Interrupt Module (INT)
Address
0x0120
Name
IVBR
Bit 7
R
W
Bit 6
Bit 5
Bit 4
Bit 3
IVB_ADDR[7:0]
Bit 2
Bit 1
Bit 0
0x0121–0x13F Reserved
Address Name
Bit 7
0x0121-
0x013F
R
Reserved
W
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
MC9S12G Family Reference Manual, Rev.1.01
1132
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.