MC9S12G Datasheet, PDF (56/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Device Overview MC9S12G-Family
Table 1-10. 48-Pin LQFP/QFN Pinout for S12GN16 and S12GN32
Function
<----lowest-----PRIORITY-----highest---->
Power
Package Pin Pin
2nd
Func.
3rd
Func.
4th
Func
5th
Func
Supply
Internal Pull
Resistor
CTRL
Reset
State
28
PAD9
KWAD9 ACMPO
—
29
PAD2
KWAD2
AN2
—
30
PAD10 KWAD10 ACMPP
31
PAD3
KWAD3
AN3
—
32
PAD11 KWAD11 ACMPM
33
PAD4
KWAD4
AN4
—
34
PAD5
KWAD5
AN5
—
35
PAD6
KWAD6
AN6
—
36
PAD7
KWAD7
AN7
—
37
VDDA
VRH
—
—
—
V_DDA PER0AD/PPS0AD Disabled
—
V_DDA PER1AD/PPS1AD Disabled
V_DDA PER0AD/PPS0AD Disabled
—
V_DDA PER1AD/PPS1AD Disabled
V_DDA PER0AD/PPS0AD Disabled
—
V_DDA PER1AD/PPS1AD Disabled
—
V_DDA PER1AD/PPS0AD Disabled
—
V_DDA PER1AD/PPS1AD Disabled
—
V_DDA PER1AD/PPS1AD Disabled
—
—
—
—
38
VSSA
—
—
—
—
—
—
—
39
PS0
RXD0
—
—
—
V_DDX
PERS/PPSS
Up
40
PS1
TXD0
—
—
—
V_DDX
PERS/PPSS
Up
41
PS2
—
—
—
—
V_DDX
PERS/PPSS
Up
42
PS3
—
—
—
—
V_DDX
PERS/PPSS
Up
43
PS4
MISO0
—
—
—
V_DDX
PERS/PPSS
Up
44
PS5
MOSI0
—
—
—
V_DDX
PERS/PPSS
Up
45
PS6
SCK0
—
—
—
V_DDX
PERS/PPSS
Up
46
PS7 API_EXTCLK ECLK
SS0
—
V_DDX
PERS/PPSS
Up
47
PM0
—
—
—
—
V_DDX
PERM/PPSM
Disabled
48
PM1
—
—
—
—
V_DDX
PERM/PPSM
Disabled
1 _{The regular I/O characteristics (see Section A.2, “I/O Characteristics”) apply if the EXTAL/XTAL function is disabled}
1.8.2 S12GN48
1.8.2.1 Pinout 32-Pin LQFP
MC9S12G Family Reference Manual, Rev.1.01
56
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.