MC9S12G Datasheet, PDF (642/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Timer Module (TIM16B8CV3)
Table 20-7. TTOV Field Descriptions
Note: Bits related to available channels have functional significance. Writing to unavailable bits has no effect. Read from
unavailable bits return a zero.
Field
Description
7:0
TOV[7:0]
Toggle On Overflow Bits — TOVx toggles output compare pin on overflow. This feature only takes effect when
in output compare mode. When set, it takes precedence over forced output compare but not channel 7 override
events.
0 Toggle output compare pin on overflow feature disabled.
1 Toggle output compare pin on overflow feature enabled.
20.3.2.8 Timer Control Register 1/Timer Control Register 2 (TCTL1/TCTL2)
7
R
OM7
W
6
OL7
5
OM6
4
OL6
3
OM5
2
OL5
1
OM4
0
OL4
Reset
0
0
0
0
0
0
0
0
Figure 20-14. Timer Control Register 1 (TCTL1)
7
R
OM3
W
6
OL3
5
OM2
4
OL2
3
OM1
2
OL1
1
OM0
0
OL0
Reset
0
0
0
0
0
0
0
0
Figure 20-15. Timer Control Register 2 (TCTL2)
Read: Anytime
Write: Anytime
Table 20-8. TCTL1/TCTL2 Field Descriptions
Note: Bits related to available channels have functional significance. Writing to unavailable bits has no effect. Read from
unavailable bits return a zero
Field
7:0
OMx
7:0
OLx
Description
Output Mode — These eight pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OMx bits on timer port, the corresponding bit in OC7M should be cleared. For
an output line to be driven by an OCx the OCPDx must be cleared.
Output Level — These eight pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OLx bits on timer port, the corresponding bit in OC7M should be cleared. For
an output line to be driven by an OCx the OCPDx must be cleared.
MC9S12G Family Reference Manual, Rev.1.01
642
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.