MC9S12G Datasheet, PDF (143/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

PAD9
PAD8
PAD7
PAD6
Port Integration Module (S12GPIMV0)
Table 2-16. Port AD Pins AD15-8
• 48/64 LQFP: The ACMPO signal of the analog comparator is mapped to this pin when used with the
ACMP function. If the ACMP output is enabled (ACMPC[ACOPE]=1) the I/O state will be forced to
output.
• 48/64/100 LQFP: The ADC analog input channel signal AN9 and the related digital trigger input are
mapped to this pin. The ADC function has no effect on the output state. The input buffer is controlled
by the related ATDDIEN bit and the ADC trigger function.
• 48/64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
48 LQFP: ACMPO > GPO
64/100 LQFP: GPO
• 48/64/100 LQFP: The ADC analog input channel signal AN8 and the related digital trigger input are
mapped to this pin. The ADC function has no effect on the output state. The input buffer is controlled
by the related ATDDIEN bit and the ADC trigger function.
• 48/64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
48/64/100 LQFP: GPO
Table 2-17. Port AD Pins AD7-0
• 32 LQFP: The inverting input signal ACMPM of the analog comparator is mapped to this pin when used
with the ACMP function. The ACMP function has no effect on the output state. The input buffer is
controlled by the ACDIEN bit .
• Except 20 TSSOP: The ADC analog input channel signal AN7 and the related digital trigger input are
mapped to this pin. The ADC function has no effect on the output state. The input buffer is controlled
by the related ATDDIEN bit and the ADC trigger function.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
Except 20 TSSOP: GPO
• 32 LQFP: The non-inverting input signal ACMPP of the analog comparator is mapped to this pin when
used with the ACMP function. The ACMP function has no effect on the output state. The input buffer
is controlled by the ACDIEN bit .
• Except 20 TSSOP: The ADC analog input channel signal AN6 and the related digital trigger input are
mapped to this pin. The ADC function has no effect on the output state. The input buffer is controlled
by the related ATDDIEN bit and the ADC trigger function.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
Except 20 TSSOP: GPO
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
143
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.