MC9S12G Datasheet, PDF (425/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Analog-to-Digital Converter (ADC10B16CV2)
Address Name
R
0x0003 ATDCTL3
W
R
0x0004 ATDCTL4
W
R
0x0005 ATDCTL5
W
R
0x0006 ATDSTAT0
W
0x0007
Unimple- R
mented W
0x0008 ATDCMPEH ^R
W
R
0x0009 ATDCMPEL
W
R
0x000A ATDSTAT2H _W
R
0x000B ATDSTAT2L
W
R
0x000C ATDDIENH
W
R
0x000D ATDDIENL
W
R
0x000E ATDCMPHTH
W
R
0x000F ATDCMPHTL
W
0x0010
R
ATDDR0
W
0x0012
ATDDR1 ^R
W
0x0014
R
ATDDR2
W
0x0016
R
ATDDR3 _W
0x0018
R
ATDDR4
W
0x001A
R
ATDDR5
W
0x001C
R
ATDDR6
W
0x001E
R
ATDDR7
W
0x0020
R
ATDDR8
W
0x0022
R
ATDDR9
W
Bit 7
DJM
SMP2
0
SCF
0
6
5
4
S8C
S4C
S2C
SMP1 SMP0
SC
SCAN MULT
0
ETORF FIFOR
0
0
0
3
S1C
CD
CC3
0
2
FIFO
1
FRZ1
PRS[4:0]
CC
CC2
CB
CC1
0
0
CMPE[15:8]
CMPE[7:0]
CCF[15:8]
CCF[7:0]
IEN[15:8]
IEN[7:0]
CMPHT[15:8]
CMPHT[7:0]
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
= Unimplemented or Reserved
Figure 13-2. ADC10B16C Register Summary (Sheet 2 of 3)
Bit 0
FRZ0
CA
CC0
0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
425
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.